1. Field of the Invention
The present invention relates to integrated circuit products, and more particularly, to method and apparatus for verifying the programming of antifuse elements in integrated circuits.
2. Description of the Related Art
Contemporary memory products require a high degree of redundancy in order to improve manufacturing yields. Present redundancy techniques in memory products include providing extra memory array columns and/or extra memory array rows which can be used to replace defective columns and/or rows.
Antifuses have been used as nonvolatile programmable memory elements to store logic states for implementing row and column redundancy in DRAMs. When used for redundancy implementation, antifuses are usually constructed in the same manner as the memory cell capacitors in the DRAM array. However, antifuses have other uses in memory products besides redundancy implementation. Antifuses may, for example, be used in integrated circuit memory as a mechanism for changing the operating mode of the memory or may be programmed to encode identification information about the memory, e.g., fabrication date.
An antifuse is, by definition, a two-terminal device which functions as an open circuit until programmed. Ideal programming of an antifuse results in a permanent short circuit existing between the two terminals. However, programming usually results in a resistance existing between the two terminals. The magnitude of this resistance is an indicator of whether the antifuse was successfully programmed.
Determining the resistances of antifuses in a DRAM has traditionally been accomplished by placing a DRAM in an automated circuit testing device (commonly referred to as Automated Test Equipment or ATE) and measuring the resistance of each antifuse parametrically. The measurement procedure involves physically measuring the current draw through each antifuse using a prober or similar measurement instrument. The process of measuring the current draw of individual antifuses requires placement of the probe and generation of several signals to and from the ATE. Even with the speed and sophistication of existing probers, the procedure routinely consumes 10 to 20 milliseconds per antifuse.
In a past era when 4 Megabit DRAMs represented the leading edge in DRAM sophistication, measurement times of 10 to 20 milliseconds per antifuse yielded acceptable economics for manufacturers. This was due to the relatively small number of antifuses per DRAM (approximately 20). However, the number of antifuses in a typical DRAM has increased dramatically as the circuit density of DRAMs has increased. Whereas a 4 Megabit DRAM may contains approximately 20 antifuses, a 64 Megabit DRAM may have approximately 640 antifuses, and a 256 Megabit DRAM some 5000. The time required to measure the antifuse programming for such higher density DRAMs using conventional parametric methods represents a significant strain on manufacturing efficiency.